High-Speed Interconnects Over Copper Traces
Agency / Branch:
DOD / DARPA
As technology trends towards higher system data rates with reduced size and cost, the ability to create high-speed electrical interconnections at low cost is becoming critical. High-speed I/O, integrated along with high I/O parallellicity, is allowing interconnects to achieve over 1Tb/s of total chip-to-chip data rates. These rates are on a rapid upward trend, increasing at a rate of about 20% per year. As this trend continues, chips with many hundreds of parallel 20 Gb/s I/Os will be on the scene within the next few years. In order to compensate for the inadequacies of the interconnect technologies, chip manufacturers are integrating low-jitter clock circuits, adaptive equalization and multilevel signaling into chip I/O. However, the high nonrecurring costs involved in such approaches can only be afforded by the highest volume applications. Using commercial materials and printed circuit manufacturing methods, this proposed program will develop an inexpensive technology for increasing the bandwidth of copper traces on printed circuits. The approach involves using novel networks and repeaters to optimize each data channel at the design stage using conventional design tools. Our techniques will permit creation of copper-clad printed circuits using conventional materials, such as FR4, yet support single channel data rates in excess of 10Gb/s.
Small Business Information at Submission:
AGUILA TECHNOLOGIES, INC.
310 Via Vera Cruz Suite 107 San Marcos, CA 92078
Number of Employees: