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Multi-Channel Integrated Transmitter

Award Information
Agency: Department of Defense
Branch: Missile Defense Agency
Contract: FA8750-04-C-0225
Agency Tracking Number: B041-029-1110
Amount: $99,493.00
Phase: Phase I
Program: SBIR
Solicitation Topic Code: MDA04-029
Solicitation Number: 2004.1
Timeline
Solicitation Year: 2004
Award Year: 2004
Award Start Date (Proposal Award Date): 2004-09-10
Award End Date (Contract End Date): 2005-09-09
Small Business Information
475 Pine Ave.
Santa Barbara, CA 93117
United States
DUNS: 040590700
HUBZone Owned: No
Woman Owned: No
Socially and Economically Disadvantaged: No
Principal Investigator
 Greg Fish
 Director of Product Devel
 (805) 690-1722
 gfish@agility.com
Business Contact
 Daniel Renner
Title: VP Research & Development
Phone: (805) 690-1760
Email: drenner@agility.com
Research Institution
N/A
Abstract

A compact, high-performance, low cost optical transmitter chip comprised of a widely-tunable laser, monolithically integrated with an array of semiconductor optical amplifiers and elelectroabsorption modulators, is a key component of an optical source suitable for arbitrary waveform generation in a dynamic scene projector. Agility Communications develops and manufactures widely-tunable CW sources and transmitters based on monolithic chip-scale integration of a Sampled-Grating Distributed Bragg Reflector (SG-DBR) laser with a Semiconductor Optical Amplifier (SOA) and Electroabsorption (EA) or Mach-Zehnder (MZ) modulator. Agility's InP chip-scale integration platform allows integration of several high-speed modulators on the same chip to provide compact, low cost integrated optical components. Additionally, utilization of an injection tuned SG-DBR laser architecture allows for high-speed frequency tuning to simulate frequency shift associated with a laser pulse reflecting off of moving objects. The objective of this project is to develop an 8 channel optical transmitter on the chip comprised of a SGDBR laser integrated with an array of eight SOA-EAMs. During Phase I of this project, one and two-channel prototypes will be characterized and the test data will be used to design an 8 channel chip. In Phase II of this program, the 8 channel chip will be fabricated and optimized. This integrated chip can be packaged to provide a small footprint (<0.6 sq. inch) multi-channel packaged module to be used in very high-density optical systems.

* Information listed above is at the time of submission. *

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