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3D Integrated Full Color Microdisplays Based on InGaN/AlGaInP Semiconductor Microemitter Arrays

Award Information
Agency: Department of Defense
Branch: Army
Contract: W15P7T-08-C-P602
Agency Tracking Number: A072-082-2377
Amount: $70,000.00
Phase: Phase I
Program: SBIR
Solicitation Topic Code: A07-082
Solicitation Number: 2007.2
Timeline
Solicitation Year: 2007
Award Year: 2007
Award Start Date (Proposal Award Date): 2007-12-13
Award End Date (Contract End Date): 2008-06-13
Small Business Information
2033 Plymouth Road
Manhattan, KS 66503, KS 66503
United States
DUNS: 017213773
HUBZone Owned: No
Woman Owned: Yes
Socially and Economically Disadvantaged: No
Principal Investigator
 Zhaoyang Fan
 VP for Research
 (785) 341-6964
 zyfan@3n-tech.com
Business Contact
 Jingyu Lin
Title: Executive Chair
Phone: (785) 341-4484
Email: jylin@3n-tech.com
Research Institution
N/A
Abstract

The goal of this SBIR project is to develop next generation inorganic semiconductor based emissive microdisplays with the following merits: •Much higher brightness and power efficiency (5 x) than the current filter based LCD and OLED microdisplays. •Resolution and pixel density higher than 15 micron per pixel with VGA, SVGA and higher format. •RGB narrow bandwidth (~ 25 nm) with high color fidelity and gamut exceeding the current display standard. •Broad full color tunability. •High gray scale. •Wide viewing angle (>120 o). •Pixel response on nanoseconds scale. •Robust and long lifetime. To achieve the above goals, the proposed architecture will be based on 3D integration of stacked semiconductor RGB micro-emitter pixels with silicon CMOS driver/processor. The RGB micro-emitters have a vertically stacked structure with full-color tunability, ensuring a minimum pixel size. They are based on highly efficient InGaN for blue/green wavelength and AlGaInP for red wavelength emission, which are vertically integrated through thin-film transfer. The micro-emitter array will be bonded onto a silicon IC driver/processor substrate by flip-chip bonding and SiO2 based wafer bonding.

* Information listed above is at the time of submission. *

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