Fiscal Year:
1988
Title:
THE DEVELOPMENT OF EXTREMELY FAST RISC-BASED ALUS FOR CHARACTER STRING PROCESSING
Agency:
NASA
Contract:
N/A
Award Amount:
$430,000.00
Abstract:
GENERAL PURPOSE PROCESSOR ARITHMETIC LOGIC UNITS (ALUS) TYPICALLY IMPLEMENT LARGE MICRO-CODED INSTRUCTION SETS TO PROVIDE SYSTEM FLEXIBILITY, WITH THE ULTIMATE GOAL OF SUPPORTING A WIDE BASE OF APPLICATIONS. THE LARGE NUMBER OF INSTRUCTIONS RESULTS IN A COMPLEX, RELATIVELY SLOW CHIP ARCHITECTURE. IN EFFECT, BY BASING THEIR SYSTEMS ON GENERAL PURPOSE ALUS, COMPUTER MANUFACTURERS TRADE-OFF SPEED OF OPERATIONS IN FAVOR OF FLEXIBILITY. HOWEVER, HERE EXIST MANY APPLICATIONS FOR WHICH FLEXIBILITY IS NOT REQUIRED, BUT FOR WHICH SPEED IS THE MAIN GOAL. RISC-BASED SYSTEMS AIM FOR THIS MARKET NICHE. THIS PROPOSAL ADDRESSES THE DEVELOPMENT OF ASP, THE ACCELERATED STRING PROCESSOR. ASP UTILIZES A REDUCED INSTRUCTION SET COMPUTER (RISC) ARCHITECTURE TO PROVIDE PROCESSING OF CHARACTER STRINGS AT RATES IN EXCESS OF 2,000 MCOPS (MILLION CHARACTER OPERATIONS PER SECOND).
Principal Investigator:
0
Business Contact:
Hal nissley
INVESTIGATOR
Small Business Information at Submission:
Accelerated Processors Inc.
2685 Marine Way #1401 Mountain View, CA 94043
EIN/Tax ID:
DUNS:
N/A
Number of Employees:
N/A
Woman-Owned:
No
Minority-Owned:
No
HUBZone-Owned:
No