High Performance/Throughput, Low Latency and Low Power Field Programmable Gate Array (FPGA) for Software Defined Radio (SDR) and Cognitive Radio (CR)
FPGAs are widely used in nearly every DoD electronics system because of their processing capabilities, low NRE costs, field programmability, and time to market advantages over ASICs. However, FPGAs"greatest strength reconfigurability is also the source of their low performance and high power consumption limiting functionality and battery life of mobile applications. GoofyFoot Labs has developed the AMP FPGA, a low risk architectural breakthrough that simultaneously achieves the Army"s goals of enhancing tactical radio performance, connectivity, and survivability with significantly reduced power consumption. The AMP FPGA achieves unprecedented performance operating at a maximum of 1.73 GHz. The AMP FPGA"s novel architecture does not just achieve theoretical improvements; implemented circuits operate on average 3.7x faster on the AMP FPGA than cutting edge conventional FPGAs. Without sacrificing performance, the AMP FPGA reduces static power consumption by 10x and dynamic power consumption by 25x when compared to conventional FPGAs, enabling 2.5x longer mission runtimes and reduced recharge downtime with existing battery technologies. Furthermore, the AMP FPGA is inherently robust to harsh environmental conditions. The AMP FPGA is well suited for SDR, radar, video/image processing, electronic warfare, and signals intelligence applications, and provides breakthrough capabilities for both mobile and ground-based systems.
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