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Performance Enhanced Managed FPGA

Award Information
Agency: Department of Defense
Branch: Air Force
Contract: FA8651-06-C-0139
Agency Tracking Number: F051-149-1932
Amount: $1,749,730.00
Phase: Phase II
Program: SBIR
Solicitation Topic Code: AF05-149
Solicitation Number: 2005.1
Timeline
Solicitation Year: 2005
Award Year: 2006
Award Start Date (Proposal Award Date): 2006-06-26
Award End Date (Contract End Date): 2008-09-28
Small Business Information
700 Research Center Blvd.
Fayetteville, AR 72701
United States
DUNS: 044870363
HUBZone Owned: No
Woman Owned: No
Socially and Economically Disadvantaged: No
Principal Investigator
 Jason Sattler
 Senior Dev. & Systems Eng
 (479) 575-5221
 jsattler@spacephotonics.com
Business Contact
 Chuck Chalfant
Title: President / CEO
Phone: (479) 575-5316
Email: cchalfant@spacephotonics.com
Research Institution
N/A
Abstract

The Performance Enhanced Managed Field Programmable Gate Array (PEM-FPGA) is a system component that contains an FPGA, microprocessor, and security features, packaged within a Multichip Module (MCM) that provides important services, such as dynamic partial reconfiguration, defragmentation, secure bitstream decryption, and anti-tamper management. These features make this enhanced FPGA a sustainable, upgradeable component for use in a wide variety of DoD applications. Innovations include the use of a microprocessor to manage the FPGA, perform full and partial reconfiguration, defragmentation, and security functions. The algorithms running on the microprocessor are implemented in a standard high level language (i.e., C/C++), easing the upgrade and maintenance cycle as new techniques become available. Security features include basic key management, programmable decryption algorithms for bitstream security, and Anti-Tamper management. Leveraging our team’s experience as one of the Nation’s leading aerospace network innovators (MIL–STD–1553, AS 1773, IEEE 1393), and our expertise in MCM development and production, Space Photonics, Inc. (SPI) is in a unique position to successfully develop the PEM- FPGA system component.

* Information listed above is at the time of submission. *

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