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The Fast Algorithm for State Estimation (FASE) Software/Hardware-in-the-Loop (S/HWIL) for Real-Time Target Estimation

Award Information
Agency: Department of Defense
Branch: Army
Contract: W31P4Q-06-C-0476
Agency Tracking Number: A052-135-1551
Amount: $730,000.00
Phase: Phase II
Program: SBIR
Solicitation Topic Code: N/A
Solicitation Number: N/A
Timeline
Solicitation Year: N/A
Award Year: 2006
Award Start Date (Proposal Award Date): N/A
Award End Date (Contract End Date): N/A
Small Business Information
1220 Kennestone Circle, Suite E
Marietta, GA 30066
United States
DUNS: 149785201
HUBZone Owned: No
Woman Owned: No
Socially and Economically Disadvantaged: No
Principal Investigator
 Susan Dugas
 Senior Engineer
 (770) 795-8181
 susan.dugas@pra-corp.com
Business Contact
 Susan Dugas
Title: Vice President
Phone: (770) 795-8181
Email: susan.dugas@pra-corp.com
Research Institution
N/A
Abstract

Propagation Research Associates, Inc., (PRA) proposes to develop a software/hardware-in-the-loop (S/HWIL) capability that will implement the PRA Fast Algorithms for State Estimation (FASE) in a real-time environment. PRA developed a maximum likelihood estimator and a smoothed iterated filter to reduce filter transients. The PRA S/HWIL will provide a unique capability to 1) evaluate the performance of state estimation algorithms for missile engagement scenarios, 2) implement efficiently any fast state estimation algorithm with any system requiring real-time state estimation execution, 3) support real-time field testing where timely execution of target state information is essential, and 4) provide real-time target track data fusion for multiple sensor inputs. The PRA S/HWIL simulation component will run in near real-time and will consist of 1) a threat/target simulation, 2) a fire control radar simulation, and 3) a missile six-degree-of-freedom (6-DOF) simulation that includes a missile semi-active seeker simulation. The hardware component will consist of a personal computer (PC) compatible field programmable gate array (FPGA) that can be ported to any computer system. The FASE FPGA will be capable of running the fast state estimation algorithms in real time and interfacing with computer systems to allow these algorithms to be implemented and used in deployed systems.

* Information listed above is at the time of submission. *

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