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Reconfigurable Logic for HyperspectralImaging Processing

Award Information
Agency: Department of Defense
Branch: Air Force
Contract: F29601-03-C-0086
Agency Tracking Number: 021NM-0398
Amount: $746,167.00
Phase: Phase II
Program: SBIR
Solicitation Topic Code: N/A
Solicitation Number: N/A
Timeline
Solicitation Year: N/A
Award Year: 2003
Award Start Date (Proposal Award Date): N/A
Award End Date (Contract End Date): N/A
Small Business Information
20 New England Business Center
Andover, MA 01810
United States
DUNS: 073800062
HUBZone Owned: No
Woman Owned: No
Socially and Economically Disadvantaged: No
Principal Investigator
 Robin Coxe
 Principal Scientist
 (978) 689-0003
 coxe@psicorp.com
Business Contact
 B. David Green
Title: Executive Vice President
Phone: (978) 689-0003
Email: green@psicorp.com
Research Institution
N/A
Abstract

Physical Sciences Inc. (PSI) proposes to develop and test a Remotely Reconfigurable Integrated Processing Platform ([RIP]^2), a radiation-tolerant, self-monitoring digital signal processor based on reconfigurable field-programmable gate array (FPGAs). InPhase I, we demonstrated the radiometric calibration of data from the PSI AIRIS hyperspectral sensor using a Xilinx Virtex-II FPGA at a throughput of 9 Mbytes/s. We evaluated the throughput rates of two image processing algorithms executing in areconfigurable FPGA. These benchmark results informed our system design decisions for the Phase II prototype system. In the Phase II program, PSI will perform hardware-in-the-loop demonstrations of a lossless compression algorithm and a discrete cosinetransform (DCT) executing on FPGA hardware directly coupled to the focal-plane array readout electronics of a hyperspectral imager. Radiation-tolerant FPGA hardware will be designed and fabricated, and single-event upset mitigation and remotereconfiguration will be demonstrated. PSI will conduct in situ tests at radiation facilities to assess system performance executing the lossless image compression and DCT algorithms in a simulated space radiation environment. The result of a successfulPhase II program will be a flight-ready [RIP]^2 system with an innovative on-chip radiation monitor to regulate FPGA operating mode so as to increase fault tolerance.

* Information listed above is at the time of submission. *

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