DOUBLE DESCRAMBLER RECEIVER UNIT WITH PSEUDO STRAIGHTFORWARD SYNCHRONIZATION

Physical Optics Corporation, Applied Technology Division, proposes to design and develop a Double Descrambling Receiver (DDR) using high-speed Digital Signal Processor (DSP) technology. While DSPs have beem commercially available for some time, they have not (to the best of our knowledge) been applied to digital satellite communications. POC's DDR will use an imbedded processor to control the PSS algorithm (which will also be developed in this program) in order to dramatically improve the quality of the transponder signal. This increase in performance can potentially be orders of magnitude greater than existing satellite data link transponders. One of the greatest benefits of the DDR is that is can be easily integrated into existing systems, as well as designed into future ones. This is a significant step forward in improving the performance of ultra high frequency satellite (and other) communications. POC's DDR will operated using a pseudo straightforward synchronization (PSS) method controlled by an imbedded processor. POC belives that the innovative combination of a novel imbedded processor architecture suing DSPs and POC's PSS algorithm will dramatically improve receiver performance in satellite systems.