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Direct Digital Synthesizer for JTRS-compliant Communication Systems

Award Information
Agency: Department of Defense
Branch: Army
Contract: DAAB07-03-C-B00
Agency Tracking Number: A022-2617
Amount: $119,579.00
Phase: Phase I
Program: SBIR
Solicitation Topic Code: N/A
Solicitation Number: N/A
Timeline
Solicitation Year: N/A
Award Year: 2003
Award Start Date (Proposal Award Date): N/A
Award End Date (Contract End Date): N/A
Small Business Information
175 Clearbrook Road
Elmsford, NY 10523
United States
DUNS: N/A
HUBZone Owned: No
Woman Owned: No
Socially and Economically Disadvantaged: No
Principal Investigator
 Oleg Mukhanov
 VP of Technology
 (914) 592-1190
 mukhanov@hypres.com
Business Contact
 Edward Kulinski
Title: VP of Finance
Phone: (914) 592-1190
Email: ekulinski@hypres.com
Research Institution
N/A
Abstract

HYPRES is pleased to propose the development of an ultra-low spur, high-bandwidth, low-power direct digital synthesizer (DDS). The proposed fully digital DDS will directly synthesize RF signals with spectrally-pure center frequencies up to 2 GHz andmodulate them with instantaneous bandwidth exceeding 200 MHz with various modulations including FSK, PSK, QPSK, linear FM. The DDS will be compatible with an open-system architecture to ensure seamless integration into conventional electronics environmentusing a modular superconductor/semiconductor interface. We will analyze and optimize two possible DAC architectures based on segmented and sigma-delta approaches. Both of these approaches utilize unique features of ultra-fast, ultra-low power, andfundamentally-linear superconductive single flux quantum technology. Our designs will take advantage of already developed low-speed, quantum-accurate DAC for metrology applications. In this project, we will extend operation to a GHz-range while preservingexcellent linearity and noise performance. In Phase I program, we will perform the design, feasibility analysis, and parameter optimization for high-linearity DAC technology to ensure meeting the 2-2000 MHz objective with at least 16 effective bits and 100dBc spurious free dynamic range over 200 MHz instantaneous bandwidth. In Phase II, we will build the DAC, and then assemble and evaluate a complete DDS system. This project will lead to the development of ultra-high performance direct digital synthesizersenabling Joint Tactical Radio System (JTRS) communication, advanced radar systems, any communication systems for Homeland Security as well as commercial wireless communication systems.

* Information listed above is at the time of submission. *

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