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Single Channel Sonobuoy Modular Acoustic Processor (MAP)

Award Information
Agency: Department of Defense
Branch: Navy
Contract: N/A
Agency Tracking Number: 20841
Amount: $50,000.00
Phase: Phase I
Program: SBIR
Solicitation Topic Code: N/A
Solicitation Number: N/A
Timeline
Solicitation Year: N/A
Award Year: 1991
Award Start Date (Proposal Award Date): N/A
Award End Date (Contract End Date): N/A
Small Business Information
12450 Fair Lakes Circle
Fairfax, VA 22033
United States
DUNS: N/A
HUBZone Owned: No
Woman Owned: No
Socially and Economically Disadvantaged: No
Principal Investigator
 Fred H. Bloch
 (703) 263-2800
Business Contact
Phone: () -
Research Institution
N/A
Abstract

The proposed Phase I effort will define a single channel sonobuoy processor that is capable of processing any of the current and planned sonobuoys. In addition to the pure processing function, the processor will be capable of storing a signifi- cant amount of display data and of being reconfigured, to process data from dif- ferent sensors, in a short amount of tLme. The processing system must also be capable of performing auxiliary functions, such as synchronizing with sonobuoy downlink coimnands, and performing I/0 to display, post processing, and control functions. Synchronization between sensors, for cross correlation, for instance, will also be provided. In essence, these analyses will result in the determination of a system architecture, allocating functions between the single channel Modular Acoustic Processor (MAP) and the common support functions and defining inter- function interfaces. As a precursor to definition of the processor, the initial Phase I effort will be to determine what functions the processor must implement, and what functional and physical performance is needed to meet the operational requirements. This will result in a specific recommendation for the internal structure of the processor, including interfaces, processing resources, and storage. Also included in the processor design will be the run time software structure, and the assign- ment of functions among the various levels of software that will execute on the processor.

* Information listed above is at the time of submission. *

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