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Characterization and Mitigation of Radiation Effects in High-Speed Compound Semiconductor Microelectronics

Award Information
Agency: Department of Defense
Branch: Defense Threat Reduction Agency
Contract: HDTRA1-10-C-0018
Agency Tracking Number: T081-003-0039
Amount: $749,982.00
Phase: Phase II
Program: SBIR
Solicitation Topic Code: DTRA08-003
Solicitation Number: 2008.1
Timeline
Solicitation Year: 2008
Award Year: 2009
Award Start Date (Proposal Award Date): 2009-11-17
Award End Date (Contract End Date): 2011-11-16
Small Business Information
215 Wynn Dr., 5th Floor
Huntsville, AL 35805
United States
DUNS: 185169620
HUBZone Owned: No
Woman Owned: Yes
Socially and Economically Disadvantaged: No
Principal Investigator
 Marek Turowski
 Director of Nano Electron
 (256) 726-4800
 tsb@cfdrc.com
Business Contact
 Deb Phipps
Title: Contract Specialist
Phone: (256) 726-4884
Email: dap@cfdrc.com
Research Institution
N/A
Abstract

For ultra high-speed, ultra low-power applications in DoD space and weapons systems, devices and circuits fabricated from III–V semiconductor compounds offer significant advantages over silicon-based technology. However, the uncertainty in single-event-effect (SEE) response of compound semiconductor technologies forces the use of empirically-based hardening techniques with penalties in increased power, area, and weight. To enable better characterization and mitigation of SEEs in modern III-V technologies, CFDRC, in collaboration with Northrop Grumman Corporation (NGC) and Naval Research Laboratory (NRL), proposes the following innovations: (a) Accurate and cost-effective modeling of radiation effects in advanced, including latest antimonide-based, high-speed III-V devices and circuits, enabled by significant innovative technology additions to CFDRC’s NanoTCAD 3D/mixed-mode simulator; (b) New, more precise, charge generation models to complement the latest laser-based experimental techniques; (c) Simulation-supported design and validation of minimally-invasive mitigation techniques for SEEs. In Phase I, selected III-V devices (HEMT and HBT) were used to demonstrate applicability of the CFDRC tools to characterization of SEEs. In Phase II, the simulation efficiency and accuracy will be improved by advancing numerical methods and physics models, and the modeling will be validated against heavy-ion and pulsed-laser experiments. SEE mitigation methods for latest and future III-V devices and circuits will be numerically explored, verified, and demonstrated.

* Information listed above is at the time of submission. *

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